From 160f8ef0bc4ca51baed79b0fe22a0f85aa30c3df Mon Sep 17 00:00:00 2001 From: InsanityAutomation Date: Mon, 26 Apr 2021 08:25:12 -0400 Subject: [PATCH] Update platformio.ini --- platformio.ini | 280 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 280 insertions(+) diff --git a/platformio.ini b/platformio.ini index 9a55de9974..f3ebed4258 100644 --- a/platformio.ini +++ b/platformio.ini @@ -19,6 +19,286 @@ src_dir = Marlin boards_dir = buildroot/share/PlatformIO/boards default_envs = + 10SPro_BIL + 10SPro_BLT_BIL + CRX_BLT_UBL_NoFil + CRX_BLT_BIL_NoFil + E5PUBLSlntDZ + E5PBILSlntDZ + E5P_UBL_DZ + E5P_BIL_DZ + E5P_UBL_Slnt + E5P_BIL_Slnt + E5P_UBL + E5P_BIL + CR10Max_UBL + CR10Max_BIL + 10SProV2_UBL + 10SPro_BLT_UBL + 10SPro_UBL + CRX_BLT_UBL_Fil + CRX_BLT_BIL_Fil + 10SProV2_BIL + CRX_NoFil + CRX_Fil + E5PBILSlntDZH + E5P_BIL_DZH + E5P_UBL_SlntH + E5P_BIL_SlntH + E5P_UBLH + E5P_BILH + E5P_UBL_DZH + E5PUBLSlntDZH + 10SPro_BLT_UBL_Enc + S5_AC + S5_BLT + S5 + S5_BLT_AC + S4_BLT_AC + S4_AC + S4_BLT + S4 + CR2020 + CR10V2_BLT + CR10V2 + CR10S_BLT + CR10S + CR20_Pro + CR20_BLT + CR20 + Ender4_BLT + Ender4 + CR10_BLT_Host + CR10_BLT_SD + CR10 + CR10Mini_BLT_Host + CR10Mini_BLT_SD + CR10Mini + Ender5_BLT_Host + Ender5_BLT_SD + Ender5 + Ender2_BLT_Host + Ender2_BLT_SD + Ender2 + Ender3_BLT_Host + Ender3_BLT_SD + Ender3 + CR10S_BLT_UBL + CR20_Pro_UBL + CR10V2_UBL + CR10V2_BLT_UBL + S4_BLT_UBL + S4_BLT_AC_UBL + S5_BLT_UBL + S5_BLT_AC_UBL + 10SPro_BIL_MC + 10SPro_BLT_BIL_MC + 10SProV2_BIL_MC + 10SPro_UBL_MC + 10SPro_BLT_UBL_MC + 10SProV2_UBL_MC + CR10Max_BIL_MC + CR10Max_UBL_MC + E5P_BIL_MC + E5P_UBL_MC + E5P_BIL_Slnt_MC + E5P_UBL_Slnt_MC + E5P_BIL_DZ_MC + E5P_UBL_DZ_MC + E5PBILSlntDZ_MC + E5PUBLSlntDZ_MC + CRX_BLT_BILNoFilMC + CRX_BLT_UBLNoFilMC + CRX_BLT_BIL_Fil_MC + CRX_BLT_UBL_Fil_MC + CRX_NoFil_MC + CRX_Fil_MC + CRXPro_BIL_NoFil + CRXPro_UBL_NoFil + CRXPro_BIL_Fil + CRXPro_UBL_Fil + CRXPro_BILNoFilMC + CRXPro_UBLNoFilMC + CRXPro_BIL_Fil_MC + CRXPro_UBL_Fil_MC + CRXPro_BILNoFilME + CRXPro_UBLNoFilME + CRXPro_BIL_Fil_ME + CRXPro_UBL_Fil_ME + 10SProBLTUBLEncMC + Ender4_MC + Ender4_BLT_MC + Ender4_BLT_UBL_MC + CR20_MC + CR20_BLT_MC + CR20_BLT_UBL_MC + CR20_Pro_MC + CR20_Pro_UBL_MC + CR10S_MC + CR10S_BLT_MC + CR10V2_MC + CR10V2_BLT_MC + CR10S_BLT_UBL_MC + CR10V2_UBL_MC + CR10V2_BLT_UBL_MC + S4_MC + S4_BLT_UBL_MC + S4_AC_MC + S4_BLT_AC_UBL_MC + S5_MC + S5_BLT_UBL_MC + S5_AC_MC + S5_BLT_AC_UBL_MC + Ender3_MC + Ender3_BLT_SD_MC + Ender3_BLT_Host_MC + Ender2_MC + Ender2_BLT_SD_MC + Ender2_BLT_Host_MC + Ender5_MC + Ender5_BLT_SD_MC + Ender5_BLT_Host_MC + CR10Mini_MC + CR10Mini_BLT_SD_MC + CR10MiniBLTHostMC + CR10_MC + CR10_BLT_SD_MC + CR10_BLT_Host_MC + 10SPro_BIL_ME + 10SPro_BLT_BIL_ME + 10SProV2_BIL_ME + 10SPro_UBL_ME + 10SPro_BLT_UBL_ME + 10SProV2_UBL_ME + CR10Max_BIL_ME + CR10Max_UBL_ME + E5P_BIL_ME + E5P_UBL_ME + E5P_BIL_Slnt_ME + E5P_UBL_Slnt_ME + E5P_BIL_DZ_ME + E5P_UBL_DZ_ME + E5PBILSlntDZ_ME + E5PUBLSlntDZ_ME + CRX_BLTBILNoFilME + CRX_BLTUBLNoFilME + CRX_BLT_BIL_Fil_ME + CRX_BLT_UBL_Fil_ME + CRX_NoFil_ME + CRX_Fil_ME + 10SPro_BLTUBLEncME + Ender4_ME + Ender4_BLT_ME + Ender4_BLT_UBL_ME + CR20_ME + CR20_BLT_ME + CR20_BLT_UBL_ME + CR20_Pro_ME + CR20_Pro_UBL_ME + CR10S_ME + CR10S_BLT_ME + CR10V2_ME + CR10V2_BLT_ME + CR10S_BLT_UBL_ME + CR10V2_UBL_ME + CR10V2_BLT_UBL_ME + S4_ME + S4_BLT_UBL_ME + S4_AC_ME + S4_BLT_AC_UBL_ME + S5_ME + S5_BLT_UBL_ME + S5_AC_ME + S5_BLT_AC_UBL_ME + Ender3_ME + Ender3_BLT_SD_ME + Ender3_BLT_Host_ME + Ender2_ME + Ender2_BLT_SD_ME + Ender2_BLT_Host_ME + Ender5_ME + Ender5_BLT_SD_ME + Ender5_BLT_Host_ME + CR10Mini_ME + CR10Mini_BLT_SD_ME + CR10MiniBLTHostME + CR10_ME + CR10_BLT_SD_ME + CR10_BLT_Host_ME + Ender4_BLT_UBL + CR20_BLT_UBL + S4_BLT_MC + S4_BLT_AC_MC + S5_BLT_MC + S5_BLT_AC_MC + S4_BLT_ME + S4_BLT_AC_ME + S5_BLT_ME + S5_BLT_AC_ME + CR10S_NF + CR10S_BLT_NF + CR10V2_NF + CR10V2_BLT_NF + CR10S_BLT_UBL_NF + CR10V2_UBL_NF + CR10V2_BLT_UBL_NF + S4_NF + S4_BLT_UBL_NF + S4_BLT_NF + S4_AC_NF + S4_BLT_AC_NF + S4_BLT_AC_UBL_NF + S5_NF + S5_BLT_NF + S5_BLT_UBL_NF + S5_AC_NF + S5_BLT_AC_NF + S5_BLT_AC_UBL_NF + CR10S_MC_NF + CR10S_BLT_MC_NF + CR10V2_MC_NF + CR10V2_BLT_MC_NF + CR10S_BLT_UBL_MC_NF + CR10V2_UBL_MC_NF + CR10V2_BLT_UBL_MC_NF + S4_MC_NF + S4_BLT_MC_NF + S4_BLT_UBL_MC_NF + S4_AC_MC_NF + S4_BLT_AC_MC_NF + S4_BLT_AC_UBL_MC_NF + S5_MC_NF + S5_BLT_MC_NF + S5_BLT_UBL_MC_NF + S5_AC_MC_NF + S5_BLT_AC_MC_NF + S5_BLT_AC_UBL_MC_NF + CR10_MC_NF + CR10_BLT_SD_MC_NF + CR10_BLT_Host_MC_NF + CR10S_ME_NF + CR10S_BLT_ME_NF + CR10V2_ME_NF + CR10V2_BLT_ME_NF + CR10S_BLT_UBL_ME_NF + CR10V2_UBL_ME_NF + CR10V2_BLT_UBL_ME_NF + S4_ME_NF + S4_BLT_ME_NF + S4_BLT_UBL_ME_NF + S4_AC_ME_NF + S4_BLT_AC_ME_NF + S4_BLT_AC_UBL_ME_NF + S5_ME_NF + S5_BLT_ME_NF + S5_BLT_UBL_ME_NF + S5_AC_ME_NF + S5_BLT_AC_ME_NF + S5_BLT_AC_UBL_ME_NF + CR20_LR + CR20_BLT_LR + CR20_BLT_UBL_LR + CR20_Pro_LR CR20_Pro_UBL_LR CR10S_LR CR10S_BLT_LR