Fix DUE timer behavior when disabling servos
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@@ -47,7 +47,8 @@
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#include "../shared/servo.h"
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#include "../shared/servo_private.h"
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static volatile int8_t Channel[_Nbr_16timers]; // counter for the servo being pulsed for each timer (or -1 if refresh interval)
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static int8_t Channel[_Nbr_16timers]; // counter for the servo being pulsed for each timer (or -1 if refresh interval)
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static bool DisablePending[_Nbr_16timers]; // Instructs ISR to disable the timer at the next timer reset
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// ------------------------
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/// Interrupt handler for the TC0 channel 1.
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@@ -71,10 +72,18 @@ void Servo_Handler(const timer16_Sequence_t, Tc*, const uint8_t);
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#endif
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void Servo_Handler(const timer16_Sequence_t timer, Tc *tc, const uint8_t channel) {
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tc->TC_CHANNEL[channel].TC_SR; // clear interrupt
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int8_t cho = Channel[timer]; // Handle the prior Channel[timer] first
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if (cho < 0) // Channel -1 indicates the refresh interval completed...
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if (cho < 0) { // Channel -1 indicates the refresh interval completed...
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tc->TC_CHANNEL[channel].TC_CCR |= TC_CCR_SWTRG; // ...so reset the timer
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if (DisablePending[timer]) {
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// Disabling only after the full servo period expires prevents
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// pulses being too close together if immediately re-enabled.
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DisablePending[timer] = false;
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TC_Stop(tc, channel);
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tc->TC_CHANNEL[channel].TC_SR; // clear interrupt
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return;
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}
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}
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else if (SERVO_INDEX(timer, cho) < ServoCount) // prior channel handled?
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extDigitalWrite(SERVO(timer, cho).Pin.nbr, LOW); // pulse the prior channel LOW
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@@ -92,6 +101,8 @@ void Servo_Handler(const timer16_Sequence_t timer, Tc *tc, const uint8_t channel
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Channel[timer] = -1; // reset the timer CCR on the next call
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}
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tc->TC_CHANNEL[channel].TC_SR; // clear interrupt
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}
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static void _initISR(Tc *tc, uint32_t channel, uint32_t id, IRQn_Type irqn) {
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@@ -117,39 +128,33 @@ static void _initISR(Tc *tc, uint32_t channel, uint32_t id, IRQn_Type irqn) {
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}
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void initISR(const timer16_Sequence_t timer) {
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#ifdef _useTimer1
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if (timer == _timer1) _initISR(TC_FOR_TIMER1, CHANNEL_FOR_TIMER1, ID_TC_FOR_TIMER1, IRQn_FOR_TIMER1);
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#endif
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#ifdef _useTimer2
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if (timer == _timer2) _initISR(TC_FOR_TIMER2, CHANNEL_FOR_TIMER2, ID_TC_FOR_TIMER2, IRQn_FOR_TIMER2);
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#endif
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#ifdef _useTimer3
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if (timer == _timer3) _initISR(TC_FOR_TIMER3, CHANNEL_FOR_TIMER3, ID_TC_FOR_TIMER3, IRQn_FOR_TIMER3);
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#endif
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#ifdef _useTimer4
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if (timer == _timer4) _initISR(TC_FOR_TIMER4, CHANNEL_FOR_TIMER4, ID_TC_FOR_TIMER4, IRQn_FOR_TIMER4);
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#endif
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#ifdef _useTimer5
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if (timer == _timer5) _initISR(TC_FOR_TIMER5, CHANNEL_FOR_TIMER5, ID_TC_FOR_TIMER5, IRQn_FOR_TIMER5);
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#endif
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CRITICAL_SECTION_START();
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bool needsInit = !DisablePending[timer];
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DisablePending[timer] = false;
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CRITICAL_SECTION_END();
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if (needsInit) {
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#ifdef _useTimer1
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if (timer == _timer1) _initISR(TC_FOR_TIMER1, CHANNEL_FOR_TIMER1, ID_TC_FOR_TIMER1, IRQn_FOR_TIMER1);
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#endif
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#ifdef _useTimer2
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if (timer == _timer2) _initISR(TC_FOR_TIMER2, CHANNEL_FOR_TIMER2, ID_TC_FOR_TIMER2, IRQn_FOR_TIMER2);
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#endif
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#ifdef _useTimer3
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if (timer == _timer3) _initISR(TC_FOR_TIMER3, CHANNEL_FOR_TIMER3, ID_TC_FOR_TIMER3, IRQn_FOR_TIMER3);
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#endif
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#ifdef _useTimer4
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if (timer == _timer4) _initISR(TC_FOR_TIMER4, CHANNEL_FOR_TIMER4, ID_TC_FOR_TIMER4, IRQn_FOR_TIMER4);
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#endif
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#ifdef _useTimer5
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if (timer == _timer5) _initISR(TC_FOR_TIMER5, CHANNEL_FOR_TIMER5, ID_TC_FOR_TIMER5, IRQn_FOR_TIMER5);
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#endif
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}
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}
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void finISR(timer16_Sequence_t) {
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#ifdef _useTimer1
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TC_Stop(TC_FOR_TIMER1, CHANNEL_FOR_TIMER1);
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#endif
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#ifdef _useTimer2
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TC_Stop(TC_FOR_TIMER2, CHANNEL_FOR_TIMER2);
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#endif
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#ifdef _useTimer3
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TC_Stop(TC_FOR_TIMER3, CHANNEL_FOR_TIMER3);
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#endif
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#ifdef _useTimer4
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TC_Stop(TC_FOR_TIMER4, CHANNEL_FOR_TIMER4);
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#endif
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#ifdef _useTimer5
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TC_Stop(TC_FOR_TIMER5, CHANNEL_FOR_TIMER5);
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#endif
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void finISR(timer16_Sequence_t timer) {
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// Timer is disabled from the ISR, to ensure proper final pulse length.
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DisablePending[timer] = true;
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}
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#endif // HAS_SERVOS
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