Also implement 2 cycle saving in MultiU24X32toH16()
This commit is contained in:
committed by
InsanityAutomation
parent
004fd179d1
commit
aa3cd470da
@@ -67,11 +67,9 @@ FORCE_INLINE static uint16_t MultiU24X32toH16(uint32_t longIn1, uint32_t longIn2
|
||||
A("add %[tmp2], r1")
|
||||
A("adc %A[intRes], %[tmp1]")
|
||||
A("adc %B[intRes], %[tmp1]")
|
||||
A("lsl %[tmp2]")
|
||||
A("adc %A[intRes], %[tmp1]")
|
||||
A("adc %B[intRes], %[tmp1]")
|
||||
A("mul %D[longIn2], %A[longIn1]")
|
||||
A("add %A[intRes], r0")
|
||||
A("lsl %[tmp2]")
|
||||
A("adc %A[intRes], r0")
|
||||
A("adc %B[intRes], r1")
|
||||
A("mul %D[longIn2], %B[longIn1]")
|
||||
A("add %B[intRes], r0")
|
||||
|
||||
@@ -114,11 +114,11 @@
|
||||
#define TIMER_READ_ADD_AND_STORE_CYCLES 13UL
|
||||
|
||||
// The base ISR
|
||||
#define ISR_BASE_CYCLES 1000UL
|
||||
#define ISR_BASE_CYCLES 996UL
|
||||
|
||||
// Linear advance base time is 32 cycles
|
||||
#if ENABLED(LIN_ADVANCE)
|
||||
#define ISR_LA_BASE_CYCLES 32UL
|
||||
#define ISR_LA_BASE_CYCLES 30UL
|
||||
#else
|
||||
#define ISR_LA_BASE_CYCLES 0UL
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user